1. Field
The present disclosure relates to field effect transistors and methods of manufacturing the same. In particular, the present disclosure relates to vertical field effect transistor (vFET) devices and methods of manufacturing vFET devices.
2. Description of the Related Art
In order to provide semiconductor devices with greater operational speed and an increased level of integration, the channel length of MOS field effect transistors (MOSFETs) has been gradually reduced. However, in a planar MOSFET device structure, reducing the channel length may result in a short channel effect that may reduce the current drive capacity of the device. To control the threshold voltage of a planar MOSFET, it may be desirable to increase the impurity concentration in the channel. However, this may reduce the mobility of carriers in the channel, which may reduce the ON state current of the device. Therefore, in the planar MOSFET device structure, it may be difficult to suppress the short channel effect while obtaining a more rapid operational speed and an increased integration level.
A vertical field effect transistor (or vFET) device has a structure that may be capable of reducing the short channel effect. The vFET device includes an active region having a three-dimensional fin shape that includes source and drain regions above and below a channel region. The channel region is surrounded by a gate electrode. Thus, a three-dimensional channel may be formed along vertical surfaces, or sidewalls, of the fin. Because the channel is formed on sidewalls of the fin, the vFET device may have a larger effective channel width in a relatively small horizontal area compared to a conventional planar MOSFET. Thus, a vFET semiconductor device may have a relatively small size and a more rapid operational speed than a similarly sized conventional planar MOSFET device.
For n-channel devices, vFETs utilizing III-V channels based on InGaAs may offer significantly higher carrier mobilities and injection velocities than their Si counterparts. However, while the transport properties of the InGaAs channel are desirable, InGaAs devices have a more limited maximum VDD than Si devices. There are two sources of this VDD limitation. For In-rich channel layers, the bandgap is narrow, resulting in large Band-To-Band-Tunneling (BTBT) leakage. BTBT leakage is strongly voltage dependent, which limits the upper bound of VDD to about 0.75 V for devices generally at the 7 nm technology node and beyond.
In contrast, Ga-rich channels have large bandgaps with less associated BTBT problems. However, in devices with Ga-rich channels, the Gamma and L valleys in the conduction band are close in energy, e.g., with an energy separation less than about 0.4 eV. The conduction band energy diagram of many semiconductor materials has a valley, referred to as the Gamma valley (or Γ-valley) near a momentum of k=0. At higher or lower levels of momentum, however, there is another valley in the conduction band energy diagram, referred to as the L-valley. The difference in energy between the bottom of the Gamma-valley and the bottom of the L-valley is referred to as the L-Γ gap. Carriers in the L-valley may have low mobility compared to carriers in the Gamma-valley. It is therefore desirable for device operation that most or all carriers in a device channel be confined in the lower energy Gamma-valley.
Spillover of carriers from the Gamma-valley to the L-valley may occur in response to an applied gate voltage, with the fraction of carriers in the Gamma-valley dropping sharply with applied gate voltage. As an example, to retain a fraction of carriers in the Gamma-valley greater than 0.9, for a case of an unstrained GaAs channel layer of 5 nm thickness, a maximum gate voltage is ˜0.55V, assuming a threshold voltage of ˜0.4V.
The close proximity of the Gamma- and L-valley energy levels is particularly true for thin channel devices, in which quantum mechanical effects decrease the relative separation of the Gamma- and L-valleys. The small separation can result in a significant fraction of the electron population being in the low-mobility L-valley at equilibrium. Thus, as channel thicknesses get smaller, more spillover occurs.
Due to the low mobility of carriers in the L-valley, occupation of the L-valley results in performance degradation. While the effect is not necessarily as catastrophic as an increase in leakage current (as can happen from BTBT), it nevertheless makes VDD increases useless from a performance enhancement standpoint. That is, as VDD increases, the device may exhibit limited or no performance improvement, even while power consumption increases.
While it is possible to tailor the indium content of an InGaAs channel to optimize device performance at a desired VDD level, compositional optimization alone may not be sufficient to provide high-VDD operating ranges with high performance and/or low leakage.